date: 2023-11-03
title: CO-Assignment-3
status: DONE
author:
- AllenYGY
tags:
- CO
- Assignment
created: 2024-02-14T19:47
updated: 2024-04-08T13:39
publish: True
CO-Assignment-3
Suppose a 32-bit instruction takes the following format: (10 points)
If there are 225 opcodes and 120 general purpose registers
minimun number of bits to represent the opcode: 8 bits
There are 225 opcodes
so we need at least 8 bits to represent the opcode
minimun number of bits to represent the : 7 bits
There are 120 General purpose registers
so we need at least 7 bits to represent the opcode
opcode: 8 bits
DR: 7 bits
SR1: 7 bits
SR2: 7 bits
Unused bits: 32-8-21= 3 bits
There are
32 address lines are necessary
32 data lines are necessary
The LC-3 does not have an opcode for the logical function OR. That is, there is no instruction in the LC-3 ISA that performs the OR operation. However, we can write a sequence of instructions to implement the OR operation. The four instruction sequence below performs the OR of the contents of register 1 and register 2 and puts the result in register 3. Fill in the two missing instructions so that the four instruction sequence will do the job.
(1): 1001 100 001 111111
(2): 1001 101 010 111111
(3): 0101 110 100 000 101
(4): 1001 111 110 111111
Address X3010: 1110 0110 0011 1111
Address X3011: 0110 1000 1100 0000
Address X3012: 0110 1101 0000 0000
In the first instruction:
It firstly extend the 9 bits offset
x3F+x3011=x3050
In the second instruction:
It firstly extend the 6 bits offset
In the third instruction:
It firstly extend the 6 bits offset
Suppose the following LC-3 program is loaded into memory starting at location x30FF: (12 points)
x30FF 1110 001 00000001
x3100 0110 010 001 000010
x3101 1111 0000 00100101
x3102 0001 010 001 000001
x3103 0001 010 010 000010
X30FF: Load x3100 to
X3100: M[R1+2]->R2 Load the value of M[R1+2](x1441) to R2
X3101: TRAP x25
X3102: R1+R1->R2 R2=x6200
X3103: R2+R2->R2 R2=xC400
AGAIN x3002
ASCII x3009
NEG x300A
DSR x300B
DDR x300C
.ORIG 0011 0000 0000 0000
x3000 0010 0000 0000 1000
x3001 0010 0010 0000 1000
x3002 1010 0100 0000 1000
x3003 0000 0111 1111 1110
x3004 1011 0000 0000 0111
x3005 0001 0000 0010 0001
x3006 0001 0100 0000 0001
x3007 0000 1011 1111 1010
x3008 1111 0000 0010 0101
x3009 0000 0000 0100 0001
x300A 1111 1111 1011 0110
x300B 1111 1110 0000 0100
x300C 1111 1110 0000 0110
It print “ABCDEFGHI” on the console.